Currently, semiconductor wafer fabrication facilities for strategic requirements are available at SemiConductor Laboratory (SCL), Mohali; Gallium Arsenide Enabling Technology Centre (GAETEC), Hyderabad and Society for Integrated Circuit Technology and Applied Research (SITAR), Bengaluru, the minister said.
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Govt has Rs 100 crore budget for chip design related activities this fiscal: IT Minister Ashwini Vaishnaw
Govt has Rs 100 crore budget for chip design related activities this fiscal: IT Minister Ashwini Vaishnaw
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